Thursday, 24 August 2017

Instruction format (1 to 2 Bytes)


G G G G G M M X    X X X X A A A A 
                    X R R R X r r r

MM


MM = (00)
Register Mode 

MM = (01)
Address Mode

MM = (10)
Immediate Mode

MM = (11)
Page Mode (FUTURE)



GGGG = (00000)

LDR  Regxx,Regyy  (sets Zero Flag)
LDA  Regxx, Memory
LDI  Regxx, #Value

GGGG = (00001)
STA  RegXX,Memory

GGGG = (00010) 
INCR RegXX
INCA Memory

GGGG = (00011) 
ADDR RegXX,RegYY
ADDA RegXX,Memory
ADDI RegXX,Value

GGGG = (00100) 
SUBR RegXX,RegYY
SUBA RegXX,Memory
SUBI RegXX,Value

GGGG = (00101) 
DECR RegXX
DECA Memory

GGGG = (00110) 
MULTR RegXX, RegYY
MULTA RegXX,Memory
MULTI RegXX, Value

GGGG = (00111) 
CMPR REGxx,RegYY   (Carry, Zero)
CMPI REGxx,Value   (Carry, Zero)
CMPA REGxx,Address   (Carry, Zero)

GGGG = (01000) 
BRZ Address
BRC Address

GGGG = (01001) 
HALT

GGGG = (01010) 
OUT RegXX


GGGG = (01011) 

ANDR RegXX,RegYY
ANDI RegXX,Value
ANDA RegXX,Memory

GGGG = (01100)

ORR RegXX,RegYY
ORI RegXX,Value
ORA RegXX,Memory


GGGG = (01101)

NOTR RegXX



GGGG = (01110) 

XORR RegXX,RegYY
XORI RegXX,Value
XORA RegXX,Memory

GGGG = (11111) 
NOP

16 groups (5 bits) - 3 sub modes - (2 bits)

// Future Instructions


PUSH Reg
PUSHF
POPF
POP Reg

CALL Address
CALL Z
CALL NZ
CALL C
RET 
RETZ
RETC
RETNZ

Sunday, 20 August 2017

Monday, 14 August 2017